929 search results - page 160 / 186 » Execution architectures for program algebra |
107
click to vote
ICS
1999
Tsinghua U.
15 years 4 months ago
1999
Tsinghua U.
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
106
click to vote
ICSOC
2010
Springer
14 years 10 months ago
2010
Springer
In this demo paper we present the prototype of our fault injection testbed generator. Our tool empowers engineers to generate emulated SOA environments and to program fault injecti...
113
click to vote
HPCA
2011
IEEE
14 years 3 months ago
2011
IEEE
Future CMPs will combine many simple cores with deep cache hierarchies. With more cores, cache resources per core are fewer, and must be shared carefully to avoid poor utilization...
114
click to vote
DAC
2010
ACM
14 years 12 months ago
2010
ACM
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
114
click to vote
DAC
2012
ACM
13 years 2 months ago
2012
ACM
Caches play an important role in embedded systems by bridging the performance gap between high speed processors and slow memory. At the same time, caches introduce imprecision in ...