Sciweavers

337 search results - page 11 / 68
» Experience with Performing Architecture Tradeoff Analysis
Sort
View
80
Voted
ICDCS
2007
IEEE
15 years 3 months ago
Overlay Node Placement: Analysis, Algorithms and Impact on Applications
Abstract— Overlay routing has emerged as a promising approach to improving performance and reliability of Internet paths. To fully realize the potential of overlay routing under ...
Sabyasachi Roy, Himabindu Pucha, Zheng Zhang, Y. C...
IASTEDCCS
2004
121views Hardware» more  IASTEDCCS 2004»
14 years 11 months ago
Performance of hyperspectral imaging algorithms using itanium architecture
This paper describes the experiences and results on implementing a set of hyperspectral imaging analysis algorithms on the Itanium Processor Family. On Itanium architecture all in...
Wilfredo E. Lugo-Beauchamp, Kennie Cruz, Carmen L....
DATE
2006
IEEE
100views Hardware» more  DATE 2006»
15 years 3 months ago
Simulation and analysis of network on chip architectures: ring, spidergon and 2D mesh
NoC architectures can be adopted to support general communications among multiple IPs over multi-processor Systems on Chip (SoCs). In this work we illustrate the modeling and simu...
Luciano Bononi, Nicola Concer
IPPS
2002
IEEE
15 years 2 months ago
System-Level Analysis for MPEG-4 Decoding on a Multi-Processor Architecture
The convergence of TV and new features such as Internet and games, requires a generic media-processing platform, that enables simultaneous execution of very diverse tasks, ranging...
Egbert G. T. Jaspers, Erik B. van der Tol, Peter H...
ISCA
1994
IEEE
123views Hardware» more  ISCA 1994»
15 years 1 months ago
Software-Extended Coherent Shared Memory: Performance and Cost
This paper evaluates the tradeoffs involved in the design of the software-extended memory system of Alewife, a multiprocessor architecturethat implements coherentsharedmemorythrou...
David Chaiken, Anant Agarwal