337 search results - page 27 / 68 » Experience with Performing Architecture Tradeoff Analysis |
144
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RTAS
1997
IEEE
15 years 4 months ago
1997
IEEE
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
FPGA
2004
ACM
15 years 5 months ago
2004
ACM
In this work, we parameterize and explore the interconnect structure of pipelined FPGAs. Specifically, we explore the effects of interconnect register population, length of regist...
CCGRID
2006
IEEE
15 years 6 months ago
2006
IEEE
Advanced accelerator simulations have played a prominent role in the design and analysis of modern accelerators. Given that accelerator simulations are computational intensive and...
108
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WCRE
2002
IEEE
15 years 5 months ago
2002
IEEE
Dynamic binary translators compile machine code from a source architecture to a target architecture at run time. Due to the hard time constraints of just-in-time compilation only ...
115
Voted
FPGA
2008
ACM
15 years 2 months ago
2008
ACM
The currently accepted method of accelerating applications in FPGA soft processor systems is to design a custom hardware accelerator. This paper suggests the alternative approach ...