337 search results - page 59 / 68 » Experience with Performing Architecture Tradeoff Analysis |
ICS
2009
Tsinghua U.
15 years 2 months ago
2009
Tsinghua U.
Large Multi-Processor Systems-on-Chip use Networks-on-Chip with a high degree of reusability and scalability for message communication. Therefore, network infrastructure is a cruc...
CGO
2003
IEEE
15 years 2 months ago
2003
IEEE
The pervasive use of pointers with complicated patterns in C programs often constrains compiler alias analysis to yield conservative register allocation and promotion. Speculative...
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TC
2010
14 years 4 months ago
2010
In this paper, we define and study a new class of capacity planning models called MAP queueing networks. MAP queueing networks provide the first analytical methodology to describe ...
DAC
2002
ACM
15 years 10 months ago
2002
ACM
In this paper, we evaluate an adaptive loop parallelization strategy (i.e., a strategy that allows each loop nest to execute using different number of processors if doing so is be...
DAC
2004
ACM
15 years 10 months ago
2004
ACM
Bounded Model Checking (BMC) relies on solving a sequence of highly correlated Boolean satisfiability (SAT) problems, each of which corresponds to the existence of counter-example...