Sciweavers

337 search results - page 6 / 68
» Experience with Performing Architecture Tradeoff Analysis
Sort
View
89
Voted
CODES
2005
IEEE
15 years 3 months ago
DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs
We present a new scheme for dynamic voltage and frequency scaling (DVS) for processing multimedia streams on architectures with restricted buffer sizes. The main advantage of our ...
Alexander Maxiaguine, Samarjit Chakraborty, Lothar...
GECCO
2004
Springer
148views Optimization» more  GECCO 2004»
15 years 2 months ago
A Multi-objective Approach to Configuring Embedded System Architectures
Portable embedded systems are being driven by consumer demands to be thermally efficient, perform faster, and have longer battery life. To design such a system, various hardware un...
James Northern III, Michael A. Shanblatt
CODES
2001
IEEE
15 years 1 months ago
A design framework to efficiently explore energy-delay tradeoffs
Comprehensive exploration of the design space parameters at the system-level is a crucial task to evaluate architectural tradeoffs accounting for both energy and performance const...
William Fornaciari, Donatella Sciuto, Cristina Sil...
ICCBR
2009
Springer
15 years 4 months ago
Adaptation versus Retrieval Trade-Off Revisited: An Analysis of Boundary Conditions
In this paper we revisit the trade-off between adaptation and retrieval effort traditionally held as a principle in case-based reasoning. This principle states that the time needed...
Stephen Lee-Urban, Héctor Muñoz-Avil...
DATE
2003
IEEE
154views Hardware» more  DATE 2003»
15 years 2 months ago
Packetized On-Chip Interconnect Communication Analysis for MPSoC
Interconnect networks play a critical role in shared memory multiprocessor systems-on-chip (MPSoC) designs. MPSoC performance and power consumption are greatly affected by the pac...
Terry Tao Ye, Luca Benini, Giovanni De Micheli