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DFT
2005
IEEE
132views VLSI» more  DFT 2005»
13 years 8 months ago
Low Power BIST Based on Scan Partitioning
A built-in self-test (BIST) scheme is presented which both reduces overhead for detecting random-pattern-resistant (r.p.r.) faults as well as reduces power consumption during test...
Jinkyu Lee, Nur A. Touba
CHES
2005
Springer
123views Cryptology» more  CHES 2005»
13 years 11 months ago
Improved Higher-Order Side-Channel Attacks with FPGA Experiments
We demonstrate that masking a block cipher implementation does not sufficiently improve its security against side-channel attacks. Under exactly the same hypotheses as in a Differ...
Eric Peeters, François-Xavier Standaert, Ni...
CSREAESA
2004
13 years 7 months ago
A Low-Power Pipelined Implementation of 2D Discrete Wavelet Transform
Discrete wavelet transform has been incorporated as part of the JPEG2000 image compression standard and is being deployed in various portable consumer products. This raises the in...
Yong Liu, Edmund Ming-Kit Lai, A. Benjamin Premkum...
INFOCOM
2007
IEEE
14 years 16 days ago
Low-Power Distributed Event Detection in Wireless Sensor Networks
Abstract—In this paper we address the problem of energyefficient event detection in wireless sensor networks (WSNs). Duty cycling is a fundamental approach to conserving energy i...
Yanmin Zhu, Yunhao Liu, Lionel M. Ni, Z. Zhang
MASCOTS
2004
13 years 7 months ago
Performance Characterisation and Verification of JavaSpaces Based on Design of Experiments
In the ever increasing world of distributed systems, different middleware implementations can be compared qualitatively or quantitatively. Existing evaluation techniques are often...
Frederic Hancke, Tom Dhaene, Jan Broeckhove