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DATE
2009
IEEE
183views Hardware» more  DATE 2009»
15 years 8 months ago
SunFloor 3D: A tool for Networks On Chip topology synthesis for 3D systems on chips
Three-dimensional integrated circuits are a promising approach to address the integration challenges faced by current Systems on Chips (SoCs). Designing an efficient Network on C...
Ciprian Seiculescu, Srinivasan Murali, Luca Benini...
GD
2008
Springer
15 years 2 months ago
Graph Drawing for Security Visualization
Abstract. As the number of devices connected to the internet continues to grow rapidly and software systems are being increasingly deployed on the web, security and privacy have be...
Roberto Tamassia, Bernardo Palazzi, Charalampos Pa...
GLVLSI
2002
IEEE
108views VLSI» more  GLVLSI 2002»
15 years 6 months ago
Protected IP-core test generation
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
Alessandro Fin, Franco Fummi
HCI
2009
14 years 11 months ago
A Computational Implementation of a Human Attention Guiding Mechanism in MIDAS v5
In complex human-machine systems, the human operator is often required to intervene to detect and solve problems. Given this increased reliance on the human in these critical human...
Brian F. Gore, Becky L. Hooey, Christopher D. Wick...
JCP
2008
126views more  JCP 2008»
15 years 1 months ago
Hardware/Software Co-design Approach for an ADALINE Based Adaptive Control System
Abstract--In this paper, we report some results on hardware and software co-design of an adaptive linear neuron (ADALINE) based control system. A discrete-time Proportional-Integra...
Shouling He, Xuping Xu