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» Experiences with the DEVStone benchmark
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108
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ISVLSI
2005
IEEE
129views VLSI» more  ISVLSI 2005»
15 years 6 months ago
Reduction of Direct Tunneling Power Dissipation during Behavioral Synthesis of Nanometer CMOS Circuits
— Direct tunneling current is the major component of static power dissipation of a CMOS circuit for technology below 65nm, where the gate dielectric (SiO2) is very low. We intuit...
Saraju P. Mohanty, Ramakrishna Velagapudi, Valmiki...
99
Voted
KBSE
2005
IEEE
15 years 6 months ago
Automated path generation for software fault localization
Localizing the cause(s) of an observable error lies at the heart of program debugging. Fault localization often proceeds by comparing the failing program run with some “successf...
Tao Wang, Abhik Roychoudhury
111
Voted
VLSID
2005
IEEE
120views VLSI» more  VLSID 2005»
15 years 6 months ago
On Finding Consecutive Test Vectors in a Random Sequence for Energy-Aware BIST Design
During pseudorandom testing, a significant amount of energy and test application time is wasted for generating and for applying “useless” test vectors that do not contribute t...
Sheng Zhang, Sharad C. Seth, Bhargab B. Bhattachar...
SAC
2005
ACM
15 years 6 months ago
Stochastic scheduling of active support vector learning algorithms
Active learning is a generic approach to accelerate training of classifiers in order to achieve a higher accuracy with a small number of training examples. In the past, simple ac...
Gaurav Pandey, Himanshu Gupta, Pabitra Mitra
CEAS
2005
Springer
15 years 6 months ago
Email Task Management: An Iterative Relational Learning Approach
Today’s email clients were designed for yesterday’s email. Originally, email was merely a communication medium. Today, people engage in a variety of complex behaviours using e...
Rinat Khoussainov, Nicholas Kushmerick