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» Experimental Models for Validating Technology
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ICCAD
1994
IEEE
87views Hardware» more  ICCAD 1994»
15 years 4 months ago
On testing delay faults in macro-based combinational circuits
We consider the problem of testing for delay faults in macrobased circuits. Macro-based circuits are obtained as a result of technology mapping. Gate-level fault models cannot be ...
Irith Pomeranz, Sudhakar M. Reddy
110
Voted
DATE
2003
IEEE
128views Hardware» more  DATE 2003»
15 years 6 months ago
Flexible and Formal Modeling of Microprocessors with Application to Retargetable Simulation
Given the growth in application-specific processors, there is a strong need for a retargetable modeling framework that is capable of accurately capturing complex processor behavi...
Wei Qin, Sharad Malik
86
Voted
AAAI
1997
15 years 2 months ago
The Sounds of Silence: Towards Automated Evaluation of Student Learning in a Reading Tutor that Listens
1 We propose a paradigm for ecologically valid, authentic, unobtrusive, automatic, data-rich, fast, robust, and sensitive evaluation of computer-assisted student performance. We i...
Jack Mostow, Gregory Aist
LCN
2008
IEEE
15 years 7 months ago
Modeling of two-flow interactions under SINR model in Multi-hop Wireless Networks
—Carrier Sense Multiple Access (CSMA) protocols in Multi-hop Wireless Networks (MHWN) are known to suffer from different forms of the hidden and exposed terminal problems, leadin...
Saquib Razak, Nael B. Abu-Ghazaleh, Vinay Kolar
112
Voted
GLOBECOM
2010
IEEE
14 years 10 months ago
On Comparing the Performance of Dynamic Multi-Network Optimizations
With a large variety of wireless access technologies available, multi-homed devices may strongly improve the performance and reliability of communication when using multiple networ...
Geert Jan Hoekstra, Robert D. van der Mei, J. W. B...