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» Experimental Models for Validating Technology
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155
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EDBT
2006
ACM
266views Database» more  EDBT 2006»
16 years 3 months ago
From Analysis to Interactive Exploration: Building Visual Hierarchies from OLAP Cubes
We present a novel framework for comprehensive exploration of OLAP data by means of user-defined dynamic hierarchical visualizations. The multidimensional data model behind the OLA...
Svetlana Vinnik, Florian Mansmann
ARCS
2009
Springer
15 years 10 months ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...
171
Voted
MIDDLEWARE
2009
Springer
15 years 10 months ago
Calling the Cloud: Enabling Mobile Phones as Interfaces to Cloud Applications
Mobile phones are set to become the universal interface to online services and cloud computing applications. However, using them for this purpose today is limited to two configura...
Ioana Giurgiu, Oriana Riva, Dejan Juric, Ivan Kriv...
CASES
2006
ACM
15 years 9 months ago
High-level power analysis for multi-core chips
Technology trends have led to the advent of multi-core chips in the form of both general-purpose chip multiprocessors (CMPs) and embedded multi-processor systems-on-a-chip (MPSoCs...
Noel Eisley, Vassos Soteriou, Li-Shiuan Peh
MICRO
2003
IEEE
166views Hardware» more  MICRO 2003»
15 years 8 months ago
Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation
With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the...
Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pa...