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» Experimenting with buffer sizes in routers
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LISA
2007
14 years 11 months ago
Application Buffer-Cache Management for Performance: Running the World's Largest MRTG
An operating system’s readahead and buffer-cache behaviors can significantly impact application performance; most often these better performance, but occasionally they worsen it...
David Plonka, Archit Gupta, Dale Carder
AINA
2010
IEEE
14 years 6 months ago
TCP Testing: How Well Does ns2 Match Reality?
New transport protocols continue to appear as alternatives to the Transmission Control Protocol (TCP). Many of these are are designed to address TCP's inefficiency in operatin...
Martin Bateman, Saleem N. Bhatti
80
Voted
INFOCOM
2011
IEEE
14 years 25 days ago
Identifying mobiles hiding behind wireless routers
—The network address translation technique (NAT) is widely used in wireless routers. It is a low cost solution to IPv4 address space limitations. However, cyber criminals may abu...
Yinjie Chen, Zhongli Liu, Benyuan Liu, Xinwen Fu, ...
DATE
2003
IEEE
86views Hardware» more  DATE 2003»
15 years 2 months ago
Schedulability Analysis and Optimization for the Synthesis of Multi-Cluster Distributed Embedded Systems
1 We present an approach to schedulability analysis for the synthesis of multi-cluster distributed embedded systems consisting of timetriggered and event-triggered clusters, interc...
Paul Pop, Petru Eles, Zebo Peng
ASPDAC
1995
ACM
106views Hardware» more  ASPDAC 1995»
15 years 1 months ago
Performance driven multiple-source bus synthesis using buffer insertion
A heuristic algorithm for a given topology of a multiple-source and multiple-sink bus to reduce the signal delay time is proposed. The algorithm minimizes the delay by inserting bu...
Chia-Chun Tsai, De-Yu Kao, Chung-Kuan Cheng, Ting-...