Sciweavers

123 search results - page 12 / 25
» Experimenting with buffer sizes in routers
Sort
View
ICC
2007
IEEE
140views Communications» more  ICC 2007»
15 years 3 months ago
Performance Analysis of Adaptively-Routed Wormhole-Switched Networks with Finite Buffers
—The use of adaptively-routed wormhole switched k-ary n-cubes has been motivated by the high path diversity provided by the rich topology of this family of interconnection networ...
Nasser Alzeidi, Mohamed Ould-Khaoua, Lewis M. Mack...
CIKM
2010
Springer
14 years 8 months ago
FD-buffer: a buffer manager for databases on flash disks
We design and implement FD-Buffer, a buffer manager for database systems running on flash-based disks. Unlike magnetic disks, flash media has an inherent read-write asymmetry: w...
Sai Tung On, Yinan Li, Bingsheng He, Ming Wu, Qion...
ICCS
2004
Springer
15 years 2 months ago
Predicting MPI Buffer Addresses
Communication latencies have been identified as one of the performance limiting factors of message passing applications in clusters of workstations/multiprocessors. On the receiver...
Felix Freitag, Montse Farreras, Toni Cortes, Jes&u...
DFT
2003
IEEE
113views VLSI» more  DFT 2003»
15 years 2 months ago
Buffer and Controller Minimisation for Time-Constrained Testing of System-On-Chip
Test scheduling and Test Access Mechanism (TAM) design are two important tasks in the development of a System-on-Chip (SOC) test solution. Previous test scheduling techniques assu...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...
ICCAD
2003
IEEE
117views Hardware» more  ICCAD 2003»
15 years 6 months ago
On Whitespace and Stability in Mixed-Size Placement and Physical Synthesis
In the context of physical synthesis, large-scale standard-cell placement algorithms must facilitate incremental changes to layout, both local and global. In particular, flexible...
Saurabh N. Adya, Igor L. Markov, Paul Villarrubia