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» Experimenting with buffer sizes in routers
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ICC
2007
IEEE
15 years 3 months ago
Power Managed Packet Switching
— High power dissipation in packet switches and routers is fast turning into a key problem, owing to increasing line speeds and decreasing chip sizes. To address this issue, we i...
Aditya Dua, Benjamin Yolken, Nicholas Bambos
ISSRE
2002
IEEE
15 years 2 months ago
An Empirical Study of Tracing Techniques from a Failure Analysis Perspective
Tracing is a dynamic analysis technique to continuously capture events of interest on a running program. The occurrence of a statement, the invocation of a function, and the trigg...
Satya Kanduri, Sebastian G. Elbaum
CAL
2008
14 years 8 months ago
Transaction-Aware Network-on-Chip Resource Reservation
Packet-switched interconnect fabric, widely viewed as the de facto on-chip data communication standard in the many-core era, offers high throughput and excellent scalability. Howev...
Zheng Li, Changyun Zhu, Li Shang, Robert P. Dick, ...
PE
2006
Springer
130views Optimization» more  PE 2006»
14 years 9 months ago
Analysis of manufacturing blocking systems with Network Calculus
In this paper, the manufacturing blocking system (MBS) is studied from the Network Calculus (NetCal) perspective. By dominating an MBS by a window flow controller (WFC), we obtain...
Amit Bose, Xiaoyue Jiang, Bin Liu, Gang Li
SENSYS
2006
ACM
15 years 3 months ago
Datalink streaming in wireless sensor networks
Datalink layer framing in wireless sensor networks usually faces a trade-off between large frame sizes for high channel bandwidth utilization and small frame sizes for effective e...
Raghu K. Ganti, Praveen Jayachandran, Haiyun Luo, ...