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DATE
2005
IEEE
112views Hardware» more  DATE 2005»
15 years 8 months ago
Simultaneous Reduction of Dynamic and Static Power in Scan Structures
Power dissipation during test is a major challenge in testing integrated circuits. Dynamic power has been the dominant part of power dissipation in CMOS circuits, however, in futu...
Shervin Sharifi, Javid Jaffari, Mohammad Hosseinab...
ICDAR
2005
IEEE
15 years 8 months ago
Word Separation of Unconstrained Handwritten Text Lines in PCR Forms
An approach for segmenting handwritten text in a Pre-Hospital Care Report (PCR) is presented. Segmentation of lines and words in a PCR is extremely challenging due to the nature o...
Ifeoma Nwogu, Gyeonghwan Kim
MSE
2005
IEEE
133views Hardware» more  MSE 2005»
15 years 8 months ago
Embedded System Design with FPGAs Using HDLs (Lessons Learned and Pitfalls to Be Avoided)
This paper describes the authors experience with teaching VHDL (and more recently, Verilog) to undergraduate and graduate students at WPI and to engineers through various short co...
R. James Duckworth
GECCO
2005
Springer
152views Optimization» more  GECCO 2005»
15 years 8 months ago
Multi-level genetic algorithm (MLGA) for the construction of clock binary tree
The clock signal and clock skew become more and more important for the circuit performance. Since there are salient shortcomings in the conventional topology construction algorith...
Guofang Nan, Minqiang Li, Jisong Kou
GFKL
2005
Springer
94views Data Mining» more  GFKL 2005»
15 years 8 months ago
Modeling Memory for Melodies
The aim of the presented study was to find structural descriptions of melodies that influence recognition memory for melodies. 24 melodies were played twice to 42 test persons. I...
Daniel Müllensiefen, Christian Hennig