39 search results - page 6 / 8 » Exploiting Basic Block Value Locality with Block Reuse |
EDBT
2010
ACM
15 years 4 months ago
2010
ACM
We study the performance issue of the “iterative” record linkage (RL) problem, where match and merge operations may occur together in iterations until convergence emerges. We ...
DAC
2005
ACM
15 years 10 months ago
2005
ACM
In this work, we propose a new paradigm called power emulation, which exploits hardware acceleration to drastically speedup power estimation. Power emulation is based on the obser...
TALG
2010
14 years 4 months ago
2010
We initiate the study of error confinement in distributed applications, where the goal is that only nodes that were directly hit by a fault may deviate from their correct external...
IEEEPACT
2007
IEEE
15 years 3 months ago
2007
IEEE
Multi-core processors naturally exploit thread-level parallelism (TLP). However, extracting instruction-level parallelism (ILP) from individual applications or threads is still a ...
TC
1998
14 years 9 months ago
1998
—High instruction cache hit rates are key to high performance. One known technique to improve the hit rate of caches is to minimize cache interference by improving the layout of ...