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ISQED
2008
IEEE
153views Hardware» more  ISQED 2008»
15 years 7 months ago
Accelerating Clock Mesh Simulation Using Matrix-Level Macromodels and Dynamic Time Step Rounding
Clock meshes have found increasingly wide applications in today’s high-performance IC designs. The inherent routing redundancies associated with clock meshes lead to improved cl...
Xiaoji Ye, Min Zhao, Rajendran Panda, Peng Li, Jia...
92
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P2P
2008
IEEE
15 years 7 months ago
On the Impact of Greedy Strategies in BitTorrent Networks: The Case of BitTyrant
The success of BitTorrent has fostered the development of variants to its basic components. Some of the variants adopt greedy approaches aiming at exploiting the intrinsic altruis...
Damiano Carra, Giovanni Neglia, Pietro Michiardi
SRDS
2008
IEEE
15 years 7 months ago
An Incremental File System Consistency Checker for Block-Level CDP Systems
A block-level continuous data protection (CDP) system logs every disk block update from an application server (e.g., a file or DBMS server) to a storage system so that any disk u...
Maohua Lu, Tzi-cker Chiueh, Shibiao Lin
AICCSA
2007
IEEE
124views Hardware» more  AICCSA 2007»
15 years 7 months ago
The Maximum Common Subgraph Problem: Faster Solutions via Vertex Cover
In the maximum common subgraph (MCS) problem, we are given a pair of graphs and asked to find the largest induced subgraph common to them both. With its plethora of applications,...
Faisal N. Abu-Khzam, Nagiza F. Samatova, Mohamad A...
98
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DATE
2007
IEEE
156views Hardware» more  DATE 2007»
15 years 7 months ago
Process variation tolerant low power DCT architecture
: 2-D Discrete Cosine Transform (DCT) is widely used as the core of digital image and video compression. In this paper, we present a novel DCT architecture that allows aggressive v...
Nilanjan Banerjee, Georgios Karakonstantis, Kaushi...
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