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ICPP
2008
IEEE
15 years 4 months ago
Implementing and Exploiting Inevitability in Software Transactional Memory
—Transactional Memory (TM) takes responsibility for concurrent, atomic execution of labeled regions of code, freeing the programmer from the need to manage locks. Typical impleme...
Michael F. Spear, Michael Silverman, Luke Dalessan...
IPPS
2008
IEEE
15 years 4 months ago
Exploiting spatial parallelism in Ethernet-based cluster interconnects
In this work we examine the implications of building a single logical link out of multiple physical links. We use MultiEdge [12] to examine the throughput-CPU utilization tradeoff...
Stavros Passas, George Kotsis, Sven Karlsson, Ange...
SEMCO
2008
IEEE
15 years 4 months ago
Exploiting Semantic Query Context to Improve Search Ranking
One challenge for relevance ranking in Web search is underspecified queries. For such queries, top-ranked documents may contain information irrelevant to the search goal of the us...
Ziming Zhuang, Silviu Cucerzan
DSN
2007
IEEE
15 years 4 months ago
Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance
Transient faults are emerging as a critical concern in the reliability of general-purpose microprocessors. As architectural trends point towards multi-threaded multi-core designs,...
Alex Shye, Tipp Moseley, Vijay Janapa Reddi, Josep...
ICDCSW
2007
IEEE
15 years 4 months ago
Exploiting Gossip for Self-Management in Scalable Event Notification Systems
1 Challenges of scale have limited the development of event notification systems with strong properties, despite the urgent demand for consistency, reliability, security, and other...
Ken Birman, Anne-Marie Kermarrec, Krzysztof Ostrow...