Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
We propose an approach for reducing the energy consumption of address buses that targets both the switching and the crosstalk components of power dissipation. The method is based ...
—Multimedia requirements of the 1990’s drove wired and optical network architects to reconsider the inefficiencies of packet switching and consider long proven methods such as...
This paper proposes a data encoder to reduce switched capacitance on system bus. Our method focuses on transferring raw video data (pixels) between off-chip memory and on-chip mem...
This paper presents a prototype wearable audio player system to playback the digital audio signal transmitted through the wearer’s body without any wire. To significantly reduce...