87 search results - page 5 / 18 » Exploiting Postdominance for Speculative Parallelization |
78
Voted
LCPC
1999
Springer
15 years 3 months ago
1999
Springer
The traditional target machine of a parallelizing compiler can execute code sections either serially or in parallel. In contrast, targeting the generated code to a speculative para...
124
Voted
CC
2012
Springer
13 years 7 months ago
2012
Springer
Abstract. How can we exploit a microprocessor as efficiently as possible? The “classic” approach is static optimization at compile-time, optimizing a program for all possible u...
HPCA
1998
IEEE
15 years 3 months ago
1998
IEEE
As we look to the future, and the prospect of a billion transistors on a chip, it seems inevitable that microprocessors will exploit having multiple parallel threads. To achieve t...
105
Voted
SBACPAD
2007
IEEE
15 years 6 months ago
2007
IEEE
The necessity of devising novel thread-level speculation (TLS) techniques has become extremely important with the growing acceptance of multi-core architectures by the industry. H...
120
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HPCA
2000
IEEE
15 years 4 months ago
2000
IEEE
We consider a variety of dynamic, hardware-based methods for exploiting load/store parallelism, including mechanisms that use memory dependence speculation. While previous work ha...