Sciweavers

68 search results - page 11 / 14
» Exploiting Shared Structure in Software Verification Conditi...
Sort
View
HIPEAC
2011
Springer
13 years 9 months ago
NoC-aware cache design for multithreaded execution on tiled chip multiprocessors
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
Ahmed Abousamra, Alex K. Jones, Rami G. Melhem
SRDS
2003
IEEE
15 years 2 months ago
Transparent Runtime Randomization for Security
A large class of security attacks exploit software implementation vulnerabilities such as unchecked buffers. This paper proposes Transparent Runtime Randomization (TRR), a general...
Jun Xu, Zbigniew Kalbarczyk, Ravishankar K. Iyer
POPL
2009
ACM
15 years 10 months ago
Masked types for sound object initialization
This paper presents a type-based solution to the long-standing problem of object initialization. Constructors, the conventional mechanism for object initialization, have semantics...
Xin Qi, Andrew C. Myers
ECCV
2006
Springer
15 years 11 months ago
TextonBoost: Joint Appearance, Shape and Context Modeling for Multi-class Object Recognition and Segmentation
Abstract. This paper proposes a new approach to learning a discriminative model of object classes, incorporating appearance, shape and context information efficiently. The learned ...
Jamie Shotton, John M. Winn, Carsten Rother, Anton...
POPL
2009
ACM
15 years 10 months ago
Feedback-directed barrier optimization in a strongly isolated STM
Speed improvements in today's processors have largely been delivered in the form of multiple cores, increasing the importance of ions that ease parallel programming. Software...
Nathan Grasso Bronson, Christos Kozyrakis, Kunle O...