192 search results - page 25 / 39 » Exploiting Simulation Slack to Improve Parallel Simulation S... |
76
Voted
ISCA
2002
IEEE
15 years 2 months ago
2002
IEEE
Increasing the number of instruction queue (IQ) entries in a dynamically scheduled processor exposes more instruction-level parallelism, leading to higher performance. However, in...
GRID
2004
Springer
15 years 2 months ago
2004
Springer
A computational grid is a wide-area computing environment for cross-domain resource sharing and service integration. Resource management and load balancing are key concerns when i...
ISCA
1997
IEEE
15 years 1 months ago
1997
IEEE
The performance tradeoff between hardware complexity and clock speed is studied. First, a generic superscalar pipeline is defined. Then the specific areas of register renaming, ...
123
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HIPEAC
2011
Springer
13 years 9 months ago
2011
Springer
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
105
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PPOPP
2003
ACM
15 years 2 months ago
2003
ACM
Large-scale cluster-based Internet services often host partitioned datasets to provide incremental scalability. The aggregation of results produced from multiple partitions is a f...