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HPCA
2000
IEEE
15 years 1 months ago
2000
IEEE
We consider a variety of dynamic, hardware-based methods for exploiting load/store parallelism, including mechanisms that use memory dependence speculation. While previous work ha...
95
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ICMCS
2006
IEEE
15 years 3 months ago
2006
IEEE
The MISP Processor is a programmable media processor which supports multi-issuing, multi-threading and stream processing techniques. MISP executes applications that have been mapp...
ISCA
1998
IEEE
15 years 1 months ago
1998
IEEE
Modern processors improve instruction level parallelism by speculation. The outcome of data and control decisions is predicted, and the operations are speculatively executed and o...
IPPS
2003
IEEE
15 years 2 months ago
2003
IEEE
Concurrent multithreaded architectures exploit both instruction-level and thread-level parallelism through a combination of branch prediction and thread-level control speculation. ...
ASPLOS
1992
ACM
15 years 1 months ago
1992
ACM
The foremost goal of superscalar processor design is to increase performance through the exploitation of instruction-level parallelism (ILP). Previous studies have shown that spec...