94 search results - page 14 / 19 » Exploiting Speculative Thread-Level Parallelism on a SMT Pro... |
73
Voted
ICS
2001
Tsinghua U.
15 years 1 months ago
2001
Tsinghua U.
Recent proposals for Chip Multiprocessors (CMPs) advocate speculative, or implicit, threading in which the hardware employs prediction to peel off instruction sequences (i.e., imp...
CF
2006
ACM
15 years 3 months ago
2006
ACM
There is a continuous research effort devoted to overcome the memory wall problem. Prefetching is one of the most frequently used techniques. A prefetch mechanism anticipates the ...
HPCA
1998
IEEE
15 years 1 months ago
1998
IEEE
Most of the prediction mechanisms predict a single path to continue the execution on a branch. Alternatively, we may exploit parallelism from either possible paths of a branch, di...
ICMCS
2006
IEEE
15 years 3 months ago
2006
IEEE
Numerous approaches can be employed in exploiting computation power in processors such as superscalar, VLIW, SMT and multi-core on chip. In this paper, a UniCore VisoMT processor ...
102
Voted
HPCA
1998
IEEE
15 years 1 months ago
1998
IEEE
The performance of a concurrent multithreaded architectural model, called superthreading 15 , is studied in this paper. It tries to integrate optimizing compilation techniques and...