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VLSID
2002
IEEE
105views VLSI» more  VLSID 2002»
15 years 11 months ago
A Heuristic for Clock Selection in High-Level Synthesis
Clock selection has a significant impact on the performance and quality of designs in high-level synthesis. In most synthesis systems, a convenient value of the clock is chosen or...
J. Ramanujam, Sandeep Deshpande, Jinpyo Hong, Mahm...
86
Voted
TPDS
2010
135views more  TPDS 2010»
14 years 9 months ago
Maximizing Service Reliability in Distributed Computing Systems with Random Node Failures: Theory and Implementation
—In distributed computing systems (DCSs) where server nodes can fail permanently with nonzero probability, the system performance can be assessed by means of the service reliabil...
Jorge E. Pezoa, Sagar Dhakal, Majeed M. Hayat
NOSSDAV
2009
Springer
15 years 5 months ago
Adaptive overlay topology for mesh-based P2P-TV systems
In this paper, we propose a simple and fully distributed mechanism for constructing and maintaining the overlay topology in mesh-based P2P-TV systems. Our algorithm optimizes the ...
Richard John Lobb, Ana Paula Couto da Silva, Emili...
CLUSTER
2003
IEEE
15 years 4 months ago
A Distributed Performance Analysis Architecture for Clusters
The use of a cluster for distributed performance analysis of parallel trace data is discussed. We propose an analysis architecture that uses multiple cluster nodes as a server to ...
Holger Brunst, Wolfgang E. Nagel, Allen D. Malony
136
Voted
CASES
2007
ACM
15 years 3 months ago
Performance evaluation and optimization of dual-port SDRAM architecture for mobile embedded systems
Recently dual-port SDRAM (DPSDRAM) architecture tailored for dual-processor based mobile embedded systems has been announced where a single memory chip plays the role of the local...
Hoeseok Yang, Sungchan Kim, Hae-woo Park, Jinwoo K...