Sciweavers

1296 search results - page 90 / 260
» Exploiting communication concurrency on high performance com...
Sort
View
ASYNC
2002
IEEE
115views Hardware» more  ASYNC 2002»
15 years 4 months ago
Point to Point GALS Interconnect
Reliable, low-latency channel communication between independent clock domains may be achieved using a combination of clock pausing techniques, self-calibrating delay lines and an ...
George S. Taylor, Simon W. Moore, Robert D. Mullin...
HPCA
2003
IEEE
15 years 11 months ago
A Methodology for Designing Efficient On-Chip Interconnects on Well-Behaved Communication Patterns
As the level of chip integration continues to advance at a fast pace, the desire for efficient interconnects-whether on-chip or off-chip--is rapidly increasing. Traditional interc...
Wai Hong Ho, Timothy Mark Pinkston
EUROPAR
2009
Springer
15 years 3 months ago
Automatic Calibration of Performance Models on Heterogeneous Multicore Architectures
Multicore architectures featuring specialized accelerators are getting an increasing amount of attention, and this success will probably influence the design of future High Perfor...
Cédric Augonnet, Samuel Thibault, Raymond N...
DAC
2000
ACM
15 years 3 months ago
System design of active basestations based on dynamically reconfigurable hardware
– This paper describes the system design and implementation of Active Basestations, a novel application of the run-time reconfigurable hardware technology whose applications have...
Athanassios Boulis, Mani B. Srivastava
87
Voted
SIGMETRICS
2010
ACM
173views Hardware» more  SIGMETRICS 2010»
15 years 4 months ago
Channel fragmentation in dynamic spectrum access systems: a theoretical study
Dynamic Spectrum Access systems exploit temporarily available spectrum (‘white spaces’) and can spread transmissions over a number of non-contiguous sub-channels. Such methods...
Edward G. Coffman Jr., Philippe Robert, Florian Si...