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» Exploiting regularity for low-power design
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97
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CORR
2010
Springer
197views Education» more  CORR 2010»
15 years 27 days ago
Modelling of Human Glottis in VLSI for Low Power Architectures
The Glottal Source is an important component of voice as it can be considered as the excitation signal to the voice apparatus. Nowadays, new techniques of speech processing such a...
Nikhil Raj, R. K. Sharma
134
Voted
JCP
2008
160views more  JCP 2008»
15 years 23 days ago
A Bluetooth-based Sensor Node for Low-Power Ad Hoc Networks
TCP/IP has recently taken promising steps toward being a viable communication architecture for networked sensor nodes. Furthermore, the use of Bluetooth can enable a wide range of ...
Jens Eliasson, Per Lindgren, Jerker Delsing
100
Voted
CODES
2007
IEEE
15 years 7 months ago
A low power VLIW processor generation method by means of extracting non-redundant activation conditions
This paper proposes a low power VLIW processor generation method by automatically extracting non-redundant activation conditions of pipeline registers for clock gating. It is impo...
Hirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuc...
98
Voted
DATE
2007
IEEE
156views Hardware» more  DATE 2007»
15 years 7 months ago
Process variation tolerant low power DCT architecture
: 2-D Discrete Cosine Transform (DCT) is widely used as the core of digital image and video compression. In this paper, we present a novel DCT architecture that allows aggressive v...
Nilanjan Banerjee, Georgios Karakonstantis, Kaushi...
108
Voted
MICRO
2003
IEEE
166views Hardware» more  MICRO 2003»
15 years 6 months ago
Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation
With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the...
Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pa...