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DATE
2006
IEEE
82views Hardware» more  DATE 2006»
14 years 11 days ago
Dynamic code overlay of SDF-modeled programs on low-end embedded systems
In this paper we propose a dynamic code overlay technique of synchronous data-flow (SDF) –modeled program for low-end embedded systems which lack MMUsupport. With this technique...
Hae-woo Park, Kyoungjoo Oh, Soyoung Park, Myoung-m...
IEEEPACT
2007
IEEE
14 years 19 days ago
Error Detection Using Dynamic Dataflow Verification
Continued scaling of CMOS technology to smaller transistor sizes makes modern processors more susceptible to both transient and permanent hardware faults. Circuitlevel techniques ...
Albert Meixner, Daniel J. Sorin
ACSD
2010
IEEE
251views Hardware» more  ACSD 2010»
13 years 4 months ago
Modular Interpretation of Heterogeneous Modeling Diagrams into Synchronous Equations Using Static Single Assignment
Abstract--The ANR project SPaCIFY develops a domainspecific programming environment, Synoptic, to engineer embedded software for space applications. Synoptic is an Eclipse-based mo...
Jean-Pierre Talpin, Julien Ouy, Thierry Gautier, L...
ASPLOS
2008
ACM
13 years 8 months ago
Communication optimizations for global multi-threaded instruction scheduling
The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several lim...
Guilherme Ottoni, David I. August
ISLPED
2003
ACM
86views Hardware» more  ISLPED 2003»
13 years 11 months ago
Exploiting compiler-generated schedules for energy savings in high-performance processors
This paper develops a technique that uniquely combines the advantages of static scheduling and dynamic scheduling to reduce the energy consumed in modern superscalar processors wi...
Madhavi Gopal Valluri, Lizy Kurian John, Heather H...