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ISPASS
2007
IEEE
15 years 11 months ago
Modeling and Characterizing Power Variability in Multicore Architectures
Parameter variation due to manufacturing error will be an unavoidable consequence of technology scaling in future generations. The impact of random variation in physical factors s...
Ke Meng, Frank Huebbers, Russ Joseph, Yehea I. Ism...
ISPASS
2007
IEEE
15 years 11 months ago
Cross Binary Simulation Points
Architectures are usually compared by running the same workload on each architecture and comparing performance. When a single compiled binary of a program is executed on many diff...
Erez Perelman, Jeremy Lau, Harish Patil, Aamer Jal...
KBSE
2007
IEEE
15 years 11 months ago
Scalable automatic test data generation from modeling diagrams
We explore the automatic generation of test data that respect constraints expressed in the Object-Role Modeling (ORM) language. ORM is a popular conceptual modeling language, prim...
Yannis Smaragdakis, Christoph Csallner, Ranjith Su...
LCN
2007
IEEE
15 years 11 months ago
Node Connectivity in Vehicular Ad Hoc Networks with Structured Mobility
1 Vehicular Ad hoc NETworks (VANETs) is a subclass of Mobile Ad hoc NETworks (MANETs). However, automotive ad hoc networks will behave in fundamentally different ways than the pred...
Ivan Wang Hei Ho, Kin K. Leung, John W. Polak, Rah...
MICRO
2007
IEEE
133views Hardware» more  MICRO 2007»
15 years 11 months ago
Revisiting the Sequential Programming Model for Multi-Core
Single-threaded programming is already considered a complicated task. The move to multi-threaded programming only increases the complexity and cost involved in software developmen...
Matthew J. Bridges, Neil Vachharajani, Yun Zhang, ...
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