382 search results - page 49 / 77 » Exploring Design Space of VLIW Architectures |
APCCAS
2006
IEEE
15 years 4 months ago
2006
IEEE
We described an H.264 decoder implemented with our design methodology, in which a system function model of transaction level is first captured in SystemC and refined into RTL with ...
VLSI
2007
Springer
15 years 4 months ago
2007
Springer
— In the future, high performance computing systems may consist of multiple multicore processors and reconfigurable logic coprocessors. Industry trends indicate that such coproc...
IPPS
2002
IEEE
15 years 2 months ago
2002
IEEE
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture ar...
ISCAS
2002
IEEE
15 years 2 months ago
2002
IEEE
Multiple memory module architecture offers higher performance by providing potentially doubled memory bandwidth. Two key problems in gaining high performance in this kind of archi...
CONCURRENCY
2000
14 years 9 months ago
2000
The Virtual Interface (VI) architecture has become the industry standard for user-level network interfaces. This paper presents the implementation and evaluation of Javia, a Java ...