382 search results - page 51 / 77 » Exploring Design Space of VLIW Architectures |
106
Voted
ERSA
2010
14 years 10 months ago
2010
Partial reconfiguration (PR) enhances traditional FPGA-based high-performance reconfigurable computing by providing additional benefits such as reduced area and memory requirements...
100
Voted
DAC
2000
ACM
16 years 1 months ago
2000
ACM
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
112
Voted
IEEECIT
2005
IEEE
15 years 6 months ago
2005
IEEE
In embedded systems, performance and power are important inter-related issues that cannot be decoupled. Expensive and extensive simulations in a processor design space are usually...
DUX
2007
15 years 4 months ago
2007
Using 180 RFID tags to track and plot locations over time, guests to an event at the San Francisco Museum of Modern Art (SFMOMA) collectively constructed a public visualization of...
111
click to vote
FPGA
2008
ACM
15 years 2 months ago
2008
ACM
Application-Specific Instruction-set Processors (ASIP) can improve execution speed by using custom instructions. Several ASIP design automation flows have been proposed recently. ...