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ICASSP
2008
IEEE
15 years 3 months ago
Accurate models for estimating area and power of FPGA implementations
This paper presents accurate area and power estimation models for implementations using FPGAs from the Xilinx Virtex-2Pro family. These models are designed to facilitate efficien...
Lanping Deng, Kanwaldeep Sobti, Chaitali Chakrabar...
CSREAESA
2010
14 years 7 months ago
The First Clock Cycle Is A Real BIST
The primary goal of Built-In Self-Test (BIST) for Field Programmable Gate Arrays (FPGAs) is to completely test all programmable logic and routing resources in the device such that ...
Charles E. Stroud, Bradley F. Dutton
ECAL
2001
Springer
15 years 2 months ago
Amorphous Geometry
Amorphous computing is a recently introduced paradigm that favours geometrical configurations. The physical layout of an amorphous computer is based on a possibly irregular and er...
Ellie D'Hondt, Theo D'Hondt
ICC
2008
IEEE
122views Communications» more  ICC 2008»
15 years 3 months ago
Analysis of Fixed Outage Transmission Schemes: A Finer Look at the Full Multiplexing Point
— This paper studies the performance of transmission schemes that have rate that increases with average SNR while maintaining a fixed outage probability. This is in contrast to ...
Peng Wu, Nihar Jindal
IJNSEC
2008
106views more  IJNSEC 2008»
14 years 9 months ago
Parallel Hardware Architectures for the Cryptographic Tate Pairing
Identity-based cryptography uses pairing functions,which are sophisticated bilinear maps defined on elliptic curves.Computing pairings efficiently in software is presently a relev...
Guido Marco Bertoni, Luca Breveglieri, Pasqualina ...