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» Exploring the multiple-GPU design space
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DAC
2005
ACM
16 years 4 months ago
MP core: algorithm and design techniques for efficient channel estimation in wireless applications
Channel estimation and multiuser detection are enabling technologies for future generations of wireless applications. However, sophisticated algorithms are required for accurate c...
Yan Meng, Andrew P. Brown, Ronald A. Iltis, Timoth...
150
Voted
ASPDAC
2008
ACM
104views Hardware» more  ASPDAC 2008»
15 years 6 months ago
Variability-driven module selection with joint design time optimization and post-silicon tuning
Abstract-- Increasing delay and power variation are significant challenges to the designers as technology scales to the deep sub-micron (DSM) regime. Traditional module selection t...
Feng Wang 0004, Xiaoxia Wu, Yuan Xie
ARC
2009
Springer
165views Hardware» more  ARC 2009»
15 years 10 months ago
Optimizing the Control Hierarchy of an ECC Coprocessor Design on an FPGA Based SoC Platform
Abstract. Most hardware/software codesigns of Elliptic Curve Cryptography only have one central control unit, typically a 32 bit or 8 bit processor core. With the ability of integr...
Xu Guo, Patrick Schaumont
CSE
2009
IEEE
15 years 10 months ago
On the Design of a Suitable Hardware Platform for Protocol Stack Processing in LTE Terminals
—In this paper we present a design methodology for the identification and development of a suitable hardware platform (including dedicated hardware accelerators) for the data pl...
Sebastian Hessel, David Szczesny, Shadi Traboulsi,...
DATE
2003
IEEE
145views Hardware» more  DATE 2003»
15 years 9 months ago
Automated Bus Generation for Multiprocessor SoC Design
The performance of a system, especially a multiprocessor system, heavily depends upon the efficiency of its bus architecture. This paper presents a methodology to generate a custo...
Kyeong Keol Ryu, Vincent John Mooney