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ASPDAC
2005
ACM
100views Hardware» more  ASPDAC 2005»
13 years 8 months ago
Microarchitecture evaluation with floorplanning and interconnect pipelining
— As microprocessor technology continues to scale into the nanometer regime, recent studies show that interconnect delay will be a limiting factor for performance, and multiple c...
Ashok Jagannathan, Hannah Honghua Yang, Kris Konig...
IMC
2007
ACM
13 years 7 months ago
Usage-based dhcp lease time optimization
The Dynamic Host Configuration Protocol (DHCP) is used to dynamically allocate address space to hosts on a local area network. Despite its widespread usage, few studies exist on ...
Manas Khadilkar, Nick Feamster, Matt Sanders, Russ...
JUCS
2006
112views more  JUCS 2006»
13 years 6 months ago
A Multi-objective Genetic Approach to Mapping Problem on Network-on-Chip
Abstract: Advances in technology now make it possible to integrate hundreds of cores (e.g. general or special purpose processors, embedded memories, application specific components...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
ASPLOS
2009
ACM
14 years 1 months ago
Architectural implications of nanoscale integrated sensing and computing
This paper explores the architectural implications of integrating computation and molecular probes to form nanoscale sensor processors (nSP). We show how nSPs may enable new compu...
Constantin Pistol, Christopher Dwyer, Alvin R. Leb...
SIGCOMM
2009
ACM
14 years 24 days ago
Energy-aware performance optimization for next-generation green network equipment
Besides a more widespread sensitivity to ecological issues, the interest in energy-efficient network technologies springs from heavy and critical economical needs, since both ener...
Raffaele Bolla, Roberto Bruschi, Franco Davoli, An...