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ATS
1998
IEEE
170views Hardware» more  ATS 1998»
15 years 2 months ago
A Ring Architecture Strategy for BIST Test Pattern Generation
This paper presents a new effective Built-In Self Test (BIST) scheme that achieves 100% fault coverage with low area overhead, and without any modification of the circuit under tes...
Christophe Fagot, Olivier Gascuel, Patrick Girard,...
ITC
1998
IEEE
120views Hardware» more  ITC 1998»
15 years 2 months ago
Test generation in VLSI circuits for crosstalk noise
This paper addresses the problem of efficiently and accurately generating two-vector tests for crosstalk induced effects, such as pulses, signal speedup and slowdown, in digital c...
Weiyu Chen, Sandeep K. Gupta, Melvin A. Breuer
WLP
1997
Springer
15 years 1 months ago
Constrained Partial Deduction
eduction strategies for logic programs often use an abstraction operator to guarantee the niteness of the set of goals for which partial deductions are . Findingan abstraction ope...
Michael Leuschel, Danny De Schreye
ICCAD
1994
IEEE
117views Hardware» more  ICCAD 1994»
15 years 1 months ago
Optimal latch mapping and retiming within a tree
We propose a technology mapping algorithm that takes existing structural technology-mapping algorithms based on dynamic programming [1,3,4] and extends them to retime pipelined cir...
Joel Grodstein, Eric Lehman, Heather Harkness, Her...
PLSA
1994
15 years 1 months ago
Language and Architecture Paradigms as Object Classes
Computer language paradigms offer linguistic abstractions and proof theories for expressing program implementations. Similarly, system architectures offer the hardware abstractions...
Diomidis Spinellis, Sophia Drossopoulou, Susan Eis...