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ACL
2006
15 years 5 months ago
Re-Usable Tools for Precision Machine Translation
The LOGON MT demonstrator assembles independently valuable general-purpose NLP components into a machine translation pipeline that capitalizes on output quality. The demonstrator ...
Jan Tore Lønning, Stephan Oepen
HPCA
2007
IEEE
16 years 4 months ago
A Low Overhead Fault Tolerant Coherence Protocol for CMP Architectures
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On t...
Ricardo Fernández Pascual, José M. G...
SIGCOMM
2009
ACM
15 years 10 months ago
SmartRE: an architecture for coordinated network-wide redundancy elimination
Application-independent Redundancy Elimination (RE), or identifying and removing repeated content from network transfers, has been used with great success for improving network pe...
Ashok Anand, Vyas Sekar, Aditya Akella
ATS
1998
IEEE
170views Hardware» more  ATS 1998»
15 years 8 months ago
A Ring Architecture Strategy for BIST Test Pattern Generation
This paper presents a new effective Built-In Self Test (BIST) scheme that achieves 100% fault coverage with low area overhead, and without any modification of the circuit under tes...
Christophe Fagot, Olivier Gascuel, Patrick Girard,...
DPHOTO
2010
176views Hardware» more  DPHOTO 2010»
15 years 5 months ago
Low-cost space-varying FIR filter architecture for computational imaging systems
Recent research demonstrates the advantage of designing electro-optical imaging systems by jointly optimizing the optical and digital subsystems. The optical systems designed usin...
Guotong Feng, Mohammed Shoaib, Edward L. Schwartz,...