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VLSID
2004
IEEE
135views VLSI» more  VLSID 2004»
15 years 11 months ago
Design of Low Voltage Low Power CMOS OP-AMPS with Rail-to-Rail Input/Output Swing
Abstract--A novel input and output biasing circuit to extend the input common mode (CM) voltage range and the output swing to rail-to-rail in a low voltage op-amp in standard CMOS ...
S. V. Gopalaiah, A. P. Shivaprasad, Sukanta K. Pan...
VLSID
2004
IEEE
111views VLSI» more  VLSID 2004»
15 years 11 months ago
On Buffering Schemes for Long Multi-Layer Nets
We consider the problem of minimizing the delay in signal transmission over point-to-point connections across multiple metal layers in a VLSI circuit. We present an exact solution...
Vani Prasad, Madhav P. Desai
VLSID
2002
IEEE
129views VLSI» more  VLSID 2002»
15 years 11 months ago
Efficient Generation of Delay Change Curves for Noise-Aware Static Timing Analysis
In this paper, we explore the concept of using analytical models to efficiently generate delay change curves (DCCs) that can then be used to characterize the impact of noise on an...
Kanak Agarwal, Yu Cao, Takashi Sato, Dennis Sylves...
HPCA
2008
IEEE
15 years 11 months ago
A comprehensive approach to DRAM power management
This paper describes a comprehensive approach for using the memory controller to improve DRAM energy efficiency and manage DRAM power. We make three contributions: (1) we describe...
Ibrahim Hur, Calvin Lin
POPL
2007
ACM
15 years 11 months ago
Data parallel Haskell: a status report
We describe the design and current status of our effort to implement the programming model of nested data parallelism into the Glasgow Haskell Compiler. We extended the original p...
Manuel M. T. Chakravarty, Roman Leshchinskiy, Simo...