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DATE
2009
IEEE
133views Hardware» more  DATE 2009»
15 years 4 months ago
Architectural support for low overhead detection of memory violations
Violations in memory references cause tremendous loss of productivity, catastrophic mission failures, loss of privacy and security, and much more. Software mechanisms to detect me...
Saugata Ghose, Latoya Gilgeous, Polina Dudnik, Ane...
HICSS
2010
IEEE
216views Biometrics» more  HICSS 2010»
15 years 3 months ago
A Virtualization Architecture for In-Depth Kernel Isolation
Recent advances in virtualization technologies have sparked a renewed interest in the use of kernel and process virtualization as a security mechanism to enforce resource isolatio...
Jiang Wang, Sameer Niphadkar, Angelos Stavrou, Anu...
SSDBM
2003
IEEE
160views Database» more  SSDBM 2003»
15 years 3 months ago
The Virtual Data Grid: A New Model and Architecture for Data-Intensive Collaboration
It is now common to encounter communities engaged in the collaborative analysis and transformation of large quantities of data over extended time periods. We argue that these comm...
Ian T. Foster
IROS
2009
IEEE
159views Robotics» more  IROS 2009»
15 years 4 months ago
Fault-tolerant formations of mobile robots
—The goal of a robot formation control architecture is to get a number of robots into a specified form. To be effective and practical, the control architecture must be able to tr...
Ross Mead, Robert Long, Jerry B. Weinberg
ISCAS
2005
IEEE
136views Hardware» more  ISCAS 2005»
15 years 3 months ago
Architectures for ASIC implementations of low-density parity-check convolutional encoders and decoders
— Low-Density Parity-Check Convolutional Codes (LDPC-CCs) are an attractive alternative to their block-oriented counterparts, LDPC-BCs. In this paper, we introduce these codes an...
Ramkrishna Swamy, Stephen Bates, Tyler L. Brandon