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ISCAS
2005
IEEE
145views Hardware» more  ISCAS 2005»
15 years 3 months ago
A switched delay line based optical switch architecture with a bypass line
—This paper proposes a new switching architecture to be used in all optical networks. The proposed switch, M-B-Quadro switch, is extended from an original 2 x 2 two-stage multi-b...
Ho-Ting Wu, Kai-Wei Ke, Wang-Rong Chang, Hui-Tang ...
HPCC
2005
Springer
15 years 3 months ago
Memory Subsystem Characterization in a 16-Core Snoop-Based Chip-Multiprocessor Architecture
In this paper we present an exhaustive evaluation of the memory subsystem in a chip-multiprocessor (CMP) architecture composed of 16 cores. The characterization is performed making...
Francisco J. Villa, Manuel E. Acacio, José ...
WISE
2000
Springer
15 years 2 months ago
VideoMAP*: A Web-based Architecture for a Spatio-Temporal Video Database Management System
In this paper, we present a web-based architecture of a spatiotemporal video data management system, which can accommodate a wide range of activities by various types of users. Be...
Shermann S.-M. Chan, Qing Li
RTAS
1998
IEEE
15 years 2 months ago
Alleviating Priority Inversion and Non-Determinism in Real-Time CORBA ORB Core Architectures
There is increasing demand to extend Object Request Broker (ORB) middleware to support distributed applications with stringent real-time requirements. However, conventional ORB im...
Douglas C. Schmidt, Sumedh Mungee, Sergio Flores-G...
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CARDIS
1998
Springer
109views Hardware» more  CARDIS 1998»
15 years 2 months ago
The Vault, an Architecture for Smartcards to Gain Infinite Memory
Smartcard chips vendors have always done their best to embed more memory inside cards. These efforts are driven to allow their customers smartcard manufacturers - to mask more soft...
Patrick Biget