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IEEEPACT
2006
IEEE
15 years 11 months ago
Testing implementations of transactional memory
Transactional memory is an attractive design concept for scalable multiprocessors because it offers efficient lock-free synchronization and greatly simplifies parallel software....
Chaiyasit Manovit, Sudheendra Hangal, Hassan Chafi...
DAC
2006
ACM
15 years 11 months ago
Buffer memory optimization for video codec application modeled in Simulink
Reduction of the on-chip memory size is a key issue in video codec system design. Because video codec applications involve complex algorithms that are both data-intensive and cont...
Sang-Il Han, Xavier Guerin, Soo-Ik Chae, Ahmed Ami...
HPCA
2012
IEEE
14 years 15 days ago
Balancing DRAM locality and parallelism in shared memory CMP systems
Modern memory systems rely on spatial locality to provide high bandwidth while minimizing memory device power and cost. The trend of increasing the number of cores that share memo...
Min Kyu Jeong, Doe Hyun Yoon, Dam Sunwoo, Mike Sul...
ASIASIM
2004
Springer
15 years 10 months ago
LSTAFF: System Software for Large Block Flash Memory
Abstract. Recently, flash memory is widely used in embedded applications since it has strong points: non-volatility, fast access speed, shock resistance, and low power consumption...
Tae-Sun Chung, Dong-Joo Park, Yeonseung Ryu, Sugwo...
110
Voted
SODA
2004
ACM
83views Algorithms» more  SODA 2004»
15 years 6 months ago
Caching queues in memory buffers
Motivated by the need for maintaining multiple, large queues of data in modern high-performance systems, we study the problem of caching queues in memory under the following simpl...
Rajeev Motwani, Dilys Thomas