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VLDB
2007
ACM
119views Database» more  VLDB 2007»
16 years 5 months ago
Path and cache conscious prefetching (PCCP)
Main memory cache performance continues to play an important role in determining the overall performance of object-oriented, object-relational and XML databases. An effective metho...
Zhen He, Alonso Marquez
157
Voted
CODES
2001
IEEE
15 years 8 months ago
Retargetable compilation for low power
Most research to date on energy minimization in DSP processors has focuses on hardware solution. This paper examines the software-based factors affecting performance and energy co...
Wen-Tsong Shiue
154
Voted
IPPS
2002
IEEE
15 years 10 months ago
Variable Partitioning and Scheduling of Multiple Memory Architectures for DSP
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture ar...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
135
Voted
DATE
2009
IEEE
122views Hardware» more  DATE 2009»
15 years 11 months ago
Model-based synthesis and optimization of static multi-rate image processing algorithms
Abstract—High computational effort in modern image processing applications like medical imaging or high-resolution video processing often demands for massively parallel special p...
Joachim Keinert, Hritam Dutta, Frank Hannig, Chris...
148
Voted
ISCAS
2002
IEEE
124views Hardware» more  ISCAS 2002»
15 years 10 months ago
Performance optimization of multiple memory architectures for DSP
Multiple memory module architecture offers higher performance by providing potentially doubled memory bandwidth. Two key problems in gaining high performance in this kind of archi...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha