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ICCAD
2009
IEEE
118views Hardware» more  ICCAD 2009»
15 years 4 months ago
Memory organization and data layout for instruction set extensions with architecturally visible storage
Present application specific embedded systems tend to choose instruction set extensions (ISEs) based on limitations imposed by the available data bandwidth to custom functional un...
Panagiotis Athanasopoulos, Philip Brisk, Yusuf Leb...
DAC
2011
ACM
14 years 6 months ago
Rethinking memory redundancy: optimal bit cell repair for maximum-information storage
SRAM design has been a major challenge for nanoscale manufacturing technology. We propose a new bit cell repair scheme for designing maximum-information memory system (MIMS). Unli...
Xin Li
VLSID
2008
IEEE
122views VLSI» more  VLSID 2008»
16 years 18 days ago
Testing Flash Memories for Tunnel Oxide Defects
— Testing non volatile memories for tunnel oxide defects is one of the most important aspects to guarantee cell reliability. Defective tunnel oxide layer in core memory cells can...
Mohammad Gh. Mohammad, Kewal K. Saluja
ICCD
1999
IEEE
86views Hardware» more  ICCD 1999»
15 years 10 months ago
Evaluation of Computing in Memory Architectures for Digital Image Processing Applications
Continuing improvements in semiconductor density are enabling new classes of System-on-a-Chip architectures that combine extensive processing logic and high-density memory. Many o...
David L. Landis, Paul T. Hulina, Scott Deno, Luke ...
185
Voted
CORR
2004
Springer
146views Education» more  CORR 2004»
15 years 6 months ago
Mining Frequent Itemsets from Secondary Memory
Mining frequent itemsets is at the core of mining association rules, and is by now quite well understood algorithmically for main memory databases. In this paper, we investigate a...
Gösta Grahne, Jianfei Zhu