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ITC
2003
IEEE
168views Hardware» more  ITC 2003»
15 years 11 months ago
A Built-In Self-Repair Scheme for Semiconductor Memories with 2-D Redundancy
Embedded memories are among the most widely used cores in current system-on-chip (SOC) implementations. Memory cores usually occupy a significant portion of the chip area, and do...
Jin-Fu Li, Jen-Chieh Yeh, Rei-Fu Huang, Cheng-Wen ...
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
16 years 11 days ago
Virtually Pipelined Network Memory
We introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput eve...
Banit Agrawal, Timothy Sherwood
IWMM
2011
Springer
270views Hardware» more  IWMM 2011»
14 years 9 months ago
Memory management in NUMA multicore systems: trapped between cache contention and interconnect overhead
Multiprocessors based on processors with multiple cores usually include a non-uniform memory architecture (NUMA); even current 2-processor systems with 8 cores exhibit non-uniform...
Zoltan Majo, Thomas R. Gross
NCA
2006
IEEE
16 years 11 days ago
A Primary-Backup Protocol for In-Memory Database Replication
The paper presents a primary-backup protocol to manage replicated in-memory database systems (IMDBs). The protocol exploits two features of IMDBs: coarse-grain concurrency control...
Lásaro J. Camargos, Fernando Pedone, Rodrig...
SRDS
2003
IEEE
15 years 11 months ago
Sharing Memory with Semi-Byzantine Clients and Faulty Storage Servers
This paper presents fault-tolerant simulations of a single-writer multi-reader regular register in storage systems. One simulation tolerates fail-stop failures of storage servers ...
Hagit Attiya, Amir Bar-Or