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135
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ICCAD
1996
IEEE
119views Hardware» more  ICCAD 1996»
15 years 11 months ago
An algorithm for synthesis of system-level interface circuits
We describe an algorithm for the synthesis and optimization of interface circuits for embedded system components such as microprocessors, memory ASIC, and network subsystems with ...
Ki-Seok Chung, Rajesh K. Gupta, C. L. Liu
189
Voted
VECPAR
2000
Springer
15 years 10 months ago
A Parallel Implementation of an Interior-Point Algorithm for Multicommodity Network Flows
A parallel implementation of the specialized interior-point algorithm for multicommodity network flows introduced in [5] is presented. In this algorithm, the positive definite syst...
Jordi Castro, Antonio Frangioni
ARC
2010
Springer
167views Hardware» more  ARC 2010»
15 years 10 months ago
Systolic Algorithm Mapping for Coarse Grained Reconfigurable Array Architectures
Coarse Grained Reconfigurable Array (CGRA) architectures give high throughput and data reuse for regular algorithms while providing flexibility to execute multiple algorithms on th...
Kunjan Patel, Chris J. Bleakley
ACIVS
2008
Springer
16 years 1 months ago
Parallel Algorithm for Concurrent Computation of Connected Component Tree
The paper proposes a new parallel connected-component-tree construction algorithm based on line independent building and progressive merging of partial 1-D trees. Two parallelizati...
P. Matas, Eva Dokladalova, Mohamed Akil, Thierry G...
146
Voted
ICIP
2005
IEEE
16 years 8 months ago
Misregistration errors in change detection algorithms and how to avoid them
Background subtraction is a popular algorithm for video object segmentation. It identifies foreground objects by comparing the input images with a pure background image. In camera...
Dirk Farin, Peter H. N. de With