4155 search results - page 273 / 831 » External Memory Algorithms |
134
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ISCAS
2006
IEEE
16 years 27 days ago
2006
IEEE
Vertex cache of programmable geometry processor The proposed architecture of vertex cache is divided into is proposed and implemented. The proposed vertex cache is pre-TnL vertex c...
159
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ISCAS
2006
IEEE
16 years 27 days ago
2006
IEEE
Vertex texturing is state-of-the-art functionality of vertex. Thus, traditional texture caches used in RE are not the 3D geometry processor. However, it aggravates the always appli...
149
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ASPDAC
2006
ACM
16 years 26 days ago
2006
ACM
–Architectures with multiple programmable cores are becoming more attractive for video codec applications because they can provide highly concurrent computation and support multi...
188
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NORDICHI
2006
ACM
16 years 25 days ago
2006
ACM
Tac-tiles is an accessible interface that allows visually impaired users to browse graphical information using tactile and audio feedback. The system uses a graphics tablet which ...
183
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HPCC
2005
Springer
16 years 12 days ago
2005
Springer
New challenging deployment scenarios are accommodating portable devices with limited and heterogeneous capabilities that roam among wireless access localities during service provis...