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107
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ICPP
2007
IEEE
15 years 8 months ago
Towards Optimized Packet Classification Algorithms for Multi-Core Network Processors
In this paper, a novel packet classification scheme optimized for multi-core network processors is proposed. The algorithm, Explicit Cuttings (ExpCuts), adopts a hierarchical spac...
Yaxuan Qi, Bo Xu, Fei He, Xin Zhou, Jianming Yu, J...
VLDB
1990
ACM
104views Database» more  VLDB 1990»
15 years 6 months ago
Hash-Based Join Algorithms for Multiprocessor Computers
This paper studies a number of hash-based join algorithms for general purpose multiprocessor computers with shared memory where the amount of memory allocated to the join operatio...
Hongjun Lu, Kian-Lee Tan, Ming-Chien Shan
115
Voted
RT
2001
Springer
15 years 6 months ago
A Perceptually-Based Texture Caching Algorithm for Hardware-Based Rendering
: The performance of hardware-based interactive rendering systems is often constrained by polygon fill rates and texture map capacity, rather than polygon count alone. We present a...
Reynald Dumont, Fabio Pellacini, James A. Ferwerda
115
Voted
GLVLSI
2009
IEEE
125views VLSI» more  GLVLSI 2009»
15 years 9 months ago
Redundant wire insertion for yield improvement
Based on the insertion of internal and external redundant wires into L-type and U-type wires, an efficient two-phase reliability-driven insertion algorithm is proposed to insert r...
Jin-Tai Yan, Zhi-Wei Chen
ASPLOS
1996
ACM
15 years 6 months ago
Synchronization and Communication in the T3E Multiprocessor
This paper describes the synchronization and communication primitives of the Cray T3E multiprocessor, a shared memory system scalable to 2048 processors. We discuss what we have l...
Steven L. Scott