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VLSID
2007
IEEE
206views VLSI» more  VLSID 2007»
16 years 2 months ago
MAX: A Multi Objective Memory Architecture eXploration Framework for Embedded Systems-on-Chip
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...
DATE
2009
IEEE
133views Hardware» more  DATE 2009»
15 years 9 months ago
SecBus: Operating System controlled hierarchical page-based memory bus protection
—This paper presents a new two-levels page-based memory bus protection scheme. A trusted Operating System drives a hardware cryptographic unit and manages security contexts for e...
Lifeng Su, Stephan Courcambeck, Pierre Guillemin, ...
ITC
2003
IEEE
116views Hardware» more  ITC 2003»
15 years 7 months ago
BIST for Deep Submicron ASIC Memories with High Performance Application
Today’s ASIC designs consist of more memory in terms of both area and number of instances. The shrinking of geometries has an even greater effect upon memories due to their tigh...
Theo J. Powell, Wu-Tung Cheng, Joseph Rayhawk, Ome...
GECCO
2004
Springer
15 years 7 months ago
Winnowing Wheat from Chaff: The Chunking GA
In this work, we investigate the ability of a Chunking GA (ChGA) to reduce the size of variable length chromosomes and control bloat. The ChGA consists of a standard genetic algori...
Hal Stringer, Annie S. Wu
ICPP
1997
IEEE
15 years 6 months ago
Automatic Partitioning of Data and Computations on Scalable Shared Memory Multiprocessors
Abstract—This paper describes an algorithm for deriving data and computation partitions on scalable shared memory multiprocessors. The algorithm establishes affinity relationshi...
Sudarsan Tandri, Tarek S. Abdelrahman