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99
Voted
ISCAS
2006
IEEE
162views Hardware» more  ISCAS 2006»
15 years 5 months ago
Silicon neurons that phase-lock
Abstract—We present a silicon neuron with a dynamic, active leak that enables precise spike-timing with respect to a time-varying input signal. Our neuron models the mammalian bu...
J. H. Wittig Jr., Kwabena Boahen
97
Voted
SAC
2006
ACM
15 years 5 months ago
Interval-based robust statistical techniques for non-negative convex functions, with application to timing analysis of computer
: In chip design, one of the main objectives is to decrease its clock cycle; however, the existing approaches to timing analysis under uncertainty are based on fundamentally restri...
Michael Orshansky, Wei-Shen Wang, Martine Ceberio,...
114
Voted
ISPD
2004
ACM
146views Hardware» more  ISPD 2004»
15 years 5 months ago
Power-aware clock tree planning
Modern processors and SoCs require the adoption of poweroriented design styles, due to the implications that power consumption may have on reliability, cost and manufacturability ...
Monica Donno, Enrico Macii, Luca Mazzoni
110
Voted
ITC
2003
IEEE
148views Hardware» more  ITC 2003»
15 years 5 months ago
HyAC: A Hybrid Structural SAT Based ATPG for Crosstalk
As technology evolves into the deep sub-micron era, signal integrity problems are growing into a major challenge. An important source of signal integrity problems is the crosstalk...
Xiaoliang Bai, Sujit Dey, Angela Krstic
74
Voted
HUC
2003
Springer
15 years 4 months ago
Very Low-Cost Sensing and Communication Using Bidirectional LEDs
A novel microprocessor interface circuit is described which can alternately emit and detect light using only an LED, two digital I/O pins and a single current limiting resistor. T...
Paul H. Dietz, William S. Yerazunis, Darren Leigh