3909 search results - page 233 / 782 » Extreme Model Checking |
113
Voted
PDPTA
2003
15 years 4 months ago
2003
We present a novel approach to parallel Boolean satisfiability (SAT) checking. A distinctive feature of our parallel SAT checker is that it incorporates all essential heuristics ...
135
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TPHOL
2008
IEEE
15 years 9 months ago
2008
IEEE
Systems that can immediately react to their inputs may suffer from cyclic dependencies between their actions and the corresponding trigger conditions. For this reason, causality an...
138
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CAV
2008
Springer
15 years 5 months ago
2008
Springer
Abstract. This paper develops a local reasoning method to check lineartime temporal properties of concurrent programs. In practice, it is often infeasible to model check over the p...
126
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DAGSTUHL
2006
15 years 4 months ago
2006
Programming technologies have improved continuously during the last decades, but from an Information Systems perspective, some well-known problems associated to the design and impl...
DATE
2010
IEEE
15 years 8 months ago
2010
IEEE
—Module paths are often used to specify the delays of cells in a Verilog cell library description, which define the propagation delay for an event from an input to an output. Sp...