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» FADIC: Architectural Synthesis applied in IC Design
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DAC
2011
ACM
12 years 6 months ago
Fault-tolerant 3D clock network
Clock tree synthesis is one of the most important and challenging problems in 3D ICs. The clock signals have to be delivered by through-silicon vias (TSVs) to different tiers with...
Chiao-Ling Lung, Yu-Shih Su, Shih-Hsiu Huang, Yiyu...
VLSID
1998
IEEE
116views VLSI» more  VLSID 1998»
13 years 10 months ago
Synthesis of Testable RTL Designs
With several commercial tools becoming available, the high-level synthesis of applicationspeci c integrated circuits is nding wide spread acceptance in VLSI industry today. Existi...
C. P. Ravikumar, Sumit Gupta, Akshay Jajoo
DATE
2006
IEEE
110views Hardware» more  DATE 2006»
14 years 10 days ago
Top-down heterogeneous synthesis of analog and mixed-signal systems
A new approach for automated synthesis of analog and mixed-signal systems is presented. The heterogeneous genetic optimization strategy starts from a functional description and ev...
Ewout Martens, Georges G. E. Gielen
IC
2009
13 years 4 months ago
Efficient Distributed Search for Multicast Session Keywords
mDNS is a proposed DNS-aware, hierarchical, and scalable multicast session directory architecture that enables multicast session registration and makes them discoverable in real ti...
Piyush Harsh, Richard Newman
IPPS
2006
IEEE
14 years 9 days ago
Design and analysis of matching circuit architectures for a closest match lookup
— This paper investigates the implementation of a number of circuits used to perform a high speed closest value match lookup. The design is targeted particularly for use in a sea...
Kieran McLaughlin, Friederich Kupzog, Holger Blume...