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» FPGA Implementations of the Massively Parallel GCA Model
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FPL
2003
Springer
95views Hardware» more  FPL 2003»
15 years 2 months ago
A Model for Hardware Realization of Kernel Loops
Abstract. Hardware realization of kernel loops holds the promise of accelerating the overall application performance and is therefore an important part of the synthesis process. In...
Jirong Liao, Weng-Fai Wong, Tulika Mitra
PACT
2005
Springer
15 years 3 months ago
Optimal Behavior of a Moving Creature in the Cellular Automata Model
The goal of our investigation is to find automatically the best rule for a cell in the cellular automata model. The cells are either of type Obstacle, Empty or Creature. Only Crea...
Mathias Halbach, Rolf Hoffmann
MICRO
2007
IEEE
108views Hardware» more  MICRO 2007»
15 years 3 months ago
FPGA-Accelerated Simulation Technologies (FAST): Fast, Full-System, Cycle-Accurate Simulators
This paper describes FAST, a novel simulation methodology that can produce simulators that (i) are orders of magnitude faster than comparable simulators, (ii) are cycleaccurate, (...
Derek Chiou, Dam Sunwoo, Joonsoo Kim, Nikhil A. Pa...
74
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WCE
2007
14 years 10 months ago
High-Performance Multigrid Solvers in Reconfigurable Hardware
—Partial Differential Equations (PDEs) play an essential role in modeling real world problems. The broad field of modeling such systems has drawn the researchers’ attention for...
Safaa J. Kasbah, Issam W. Damaj
ERSA
2010
172views Hardware» more  ERSA 2010»
14 years 7 months ago
A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics
Interconnect architecture is a primary research issue for emerging many-core processors. Packet switched Networks-on-Chip (NoCs) are considered key to success but since they delive...
Heiner Giefers, Marco Platzner